Constant on-time control is widely used in power supply area because of its good transient response, simple structure and smooth mode transition. FIG. 1 illustrates a prior art constant on-time switching converter 100. The switching converter 100 comprises an on-time control circuit 101, a comparison circuit 102, a logic circuit 103, a switching circuit 104 and a slope compensation circuit 105. The switching circuit 104 is configured in a synchronous Buck topology. It comprises a high-side switch HS, a low-side switch LS, an inductor L and an output capacitor C. The common node of the high-side switch HS and the low-side switch LS is the switching node SW. The switching circuit 104 is configured to convert an input voltage Vin into an output voltage Uout. When the equivalent serial resistance (ESR) of the output capacitor C is small, sub-harmonic oscillation of the output voltage Uout may occur and cause instability of the switching converter 100. The slope compensation circuit 105 is used to generate a slope compensation signal Vslope to prevent oscillation. A comparison circuit 102 compares the output voltage Uout of the switching circuit 104 with a reference signal Uref and generates a comparison signal SET based on the comparison result. The reference signal Uref is the sum of a reference voltage Vref and the slope compensation signal Vslope. The logic circuit 103 is coupled to the output terminal of the on-time control circuit 101 to receive an on-time control signal COT, and is coupled to the comparison circuit 102 to receive the comparison signal SET, the logic circuit 103 is configured to generate a high-side control signal HCTRL for controlling the high-side switch HS and a low-side control signal LCTRL for controlling the low-side switch LS based on the on-time control signal COT and the comparison signal SET.
In order to eliminate the audible noise of the switching converter 100 in light load, the switching converter 100 further comprises an ultrasonic mode determination circuit 106 configured to judge whether the switching converter 100 enters into an ultrasonic mode (USM). Usually, when the switching frequency of the switching circuit 104 approaches an audible range (such as 20 Hz-20 kHz), the switching converter 100 enters into the ultrasonic mode. However, there are double ON pulses in the ultrasonic mode as shown in FIG. 2.
FIG. 2 illustrates a schematic waveform diagram of the switching converter 100 shown in FIG. 1 in the ultrasonic mode, wherein IL represents the current flowing through the inductor L.
As shown in FIG. 2, at time t1, the switching converter 100 enters into the ultrasonic mode, which is detected by the ultrasonic mode determination circuit 106. The logic circuit 103 turns ON the low-side switch LS to discharge the output capacitor C until the output voltage Uout decreases to reach the reference signal Uref at time t2, then the low-side switch LS is turned OFF and the high-side switch HS is turned ON.
At time t3, when the on-time of the high-side switch HS is over, the on-time control signal COT generated by the on-time control circuit 101 turns OFF the high-side switch HS. The output voltage Uout reduces to a lower value Vo_low, which is smaller than the steady state output voltage Vout. The output voltage Uout is very likely and easy to decrease to reach the reference signal Uref again. This may cause the high-side switch HS to be turned ON again. As shown in FIG. 2, the high-side switch HS is turned ON again at time t4. The output voltage Uout at time t5 will be charged to a higher value Vo_high, which is larger than the steady state output voltage Vout.
As shown in FIG. 2, in the ultrasonic mode, the high-side control signal HCTRL has two on pulses in one switching cycle of the switching converter 100. Thus there are also double pulses at the switching node SW, which leads to a large ripple of the output voltage Uout and reduces the efficiency of the switching converter 100.